Low-k & Ultra-low k Dielectric Materials for Cu Interconnects

Advances in microelectronics have been made possible by the continuous scaling of devices enabled by advanced materials & processes. As the device dimensions continue to decrease, the interconnect structure becomes the limiting factor for the performance of ULSI chips. Low dielectric constant (low k) materials as the interlayer dielectrics and low resistivity copper interconnect are being introduced to meet future interconnect demands. Nevertheless, no solution exists today to meet the requirements of interconnect beyond the year 2006. This project will investigate new materials, designs, process technologies, and reliability mechanisms for the next generation nano interconnects.