Seminar: A New Abstraction for In-Network FPGA Offloads

Modern applications increasingly demand ultra-low latency for data processing, often facilitated by host-controlled accelerators like GPUs and FPGAs. However, significant delays result from hostinvolvement in accessing accelerators. To address this limitation, we introduce a novel paradigm wecall Offloading through Remote Accelerator Calls (OffRAC), which elevates accelerators to first-classcompute resources. OffRAC enables direct calls to FPGA-based accelerators without host involvement. Utilizing the stateless function abstraction of serverless computing, with applications decomposed into simpler stateless functions, offloading promotes efficient acceleration anddistribution of computational loads across the network. To realize this proposal, we present a prototype design and implementation of an OffRAC platform for FPGAs that assembles diverserequests from multiple clients into complete accelerator calls with multi-tenancy performanceisolation. This design minimizes the implementation complexity for accelerator users while ensuringisolation and programmability. Results show that the OffRAC approach reduces the latency ofnetwork calls to accelerators down to approximately 10.5 us, as well as sustaining high applicationthroughput up to 85Gbps, demonstrating scalability and efficiency, making it compelling for thenext generation of low-latency applications.

He graduated from from Imperial College London with an MEng in 2003 and PhD in 2008. Hecompleted a Postdoctoral Research Fellowship at Trinity College Dublin in collaboration with XilinxResearch Labs, Ireland, before joining Nanyang Technological University, Singapore as AssistantProfessor in 2009. He was Associate Professor, Reader then Full Professor of Computer Engineeringat the University of Warwick from 2015, from where he is currently on leave.

Dr Fahmy received Best Paper Awards at FPT 2012, ACM TODAES 2019, IEEE HPEC 2021, and theCommunity Award at FPL 2016 and 2024. He received IBM Faculty Awards in 2013 and 2017 andwas a Turing Fellow at the Alan Turing Institute from 2017 to 2021. He sits on the ACM Technical Committee on FPGAs and is a Chartered Engineer and Fellow of the IET, as well as a Senior Memberof the ACM and IEEE.