Research Fellow (FPGA design, digital IC design, 3D display, ASIC)

Position Description:

• Develop new glass-free 3D display panel.
• Design high performance optical and circuit components for the video signal processing systems.
• Lead the ASIC design flow and project development from RTL to GDS deliver.
• Build the FPGA and ASIC prototype system which can demonstrate the 3D display panel.
• Publish academic papers on top level conferences or journals. Apply patents for the glass-free 3D display project.

Job Requirements:

• A PhD Degree in relevant discipline, e.g. Electrical Engineering, etc
• Solid understanding of digital signal processing algorithm and 3D display technology.
• Experience of the IC design flow from frontend to backend.
• Experience of FPGA development.
• Experience of embedded SOC control system design.

Application Procedure:

Interested candidates please send your CV/resume in PFD format to:
Mr Lim Jin Siew
School of Electrical & Electronic Engineering
Nanyang Technological University
50 Nanyang Avenue
Block S2.1
Singapore 639798

E-mail Address for E-mailed Applications:
Electronic submission of application is highly encouraged.

Only short-listed candidates will be notified for interview. Application closes when the positions are filled.

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