Suhaib Fahmy

Assistant Professor, School of Computer Engineering

Publications

Below you will find a list of my publications and links to download them. Note that they are provided here to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders.

You can also view my Google Scholar Citation Profile, DBLP Profile, and ArnetMiner Profile.

Peer-Reviewed Journal and Conference Papers

  1. K. Vipin and S.A. Fahmy, “Architecture-Aware Reconfiguration-Centric Floorplanning for Partial Reconfiguration” to appear in Proceedings of the International Symposium on Applied Reconfigurable Computing (ARC), Hong Kong, March 2012.

  2. S. Chakraborty, M. Lukasiewycz, C. Buckl, S.A. Fahmy, N. Chang, S. Park, Y.Kim, P. Leteinturier, and H. Adlkofer, “Embedded Systems and Software Challenges in Electric Vehicles” to appear in Proceedings of the Design, Automation and Test in Europe Conference (DATE), Dresden, Germany, March 2012, pp.424-429.

  3. H.Y. Cheah, S.A. Fahmy, D.L. Maskell, and C. Kulkarni “A Lean FPGA Soft Processor Built Using a DSP Block” in Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA), Monterey, CA, February 2012, pp. 237-240.

  4. K. Vipin and S.A. Fahmy, “Efficient Region Allocation for Adaptive Partial Reconfiguration” in Proceedings of the International Conference on Field Programmable Technology (FPT), New Delhi, India, December 2011.

  5. J. Lotze, S.A. Fahmy, J. Noguera, and L.E. Doyle, “A Model-Based Approach to Cognitive Radio Design” in IEEE Journal on Selected Areas in Communications (JSAC), 29(2), pp. 455–468, February 2011.

  6. S.A. Fahmy, “Histogram-Based Probability Density Function Estimation on FPGAs” in Proceedings of the International Conference on Field Programmable Technology (FPT), Beijing, China, December 2010, pp. 449–453.

  7. P.D. Sutton, J. Lotze, H. Lahlou, S.A. Fahmy, K.E. Nolan, B. Özgül, T.W. Rondeau, J. Noguera, and L.E. Doyle, “Iris – An Architecture for Cognitive Radio Networking Testbeds” in IEEE Communications Magazine, 48(9), pp. 114–122, September 2010.

  8. P.D. Sutton, J. Lotze, H. Lahlou, B. Özgül, S.A.Fahmy, K.E. Nolan, J. Noguera, and L.E.Doyle, “Multi-Platform Demonstrations using the Iris Architecture for Cognitive Radio Network Testbeds” in Proceedings of the International Conference on Cognitive Radio Oriented Wireless Networks and Communications (CrownCom), Cannes, France, June 2010.

  9. L.E. Doyle, P.D. Sutton, K.E. Nolan, J. Lotze, B. Özgül, T.W. Rondeau, S.A. Fahmy, H. Lahlou, and L.A. Dasilva, “Experiences from the Iris Testbed in Dynamic Spectrum Access and Cognitive Radio Experimentation” in Proceedings of the IEEE Symposia on New Frontiers in Dynamic Spectrum Access Networks (DySPAN), Singapore, April 2010.

  10. S.A. Fahmy and L.E. Doyle, “Reconfigurable Polyphase Filter Bank Architecture for Spectrum Sensing” in Proceedings of the International Symposium on Applied Reconfigurable Computing (ARC), Bangkok, Thailand, March 2010, pp. 343–350.

  11. J. Lotze, S.A. Fahmy, J. Noguera, B. Ozgül, and L. Doyle, “Spectrum Sensing on LTE Femtocells for GSM Spectrum Re-Farming Using Xilinx FPGAs” in Proceedings of the Software-Defined Radio Forum Technical Conference (SDR Forum), Washington, DC, December 2009.

  12. J. Lotze, S.A. Fahmy, J. Noguera, B. Ozgül, L. Doyle, and R. Esser, “Development Framework for Implementing FPGA-Based Cognitive Network Nodes” in Proceedings of the IEEE Global Communications Conference (GLOBECOM), Honolulu, Hawaii, December 2009.

  13. S.A. Fahmy, P.Y.K. Cheung, and W. Luk, “High-Throughput One-Dimensional Median and Weighted Median Filters on FPGA” in IET Computers and Digital Techniques (IET-CDT), 3(4), pp. 384–394, July 2009.

  14. S.A. Fahmy, J. Lotze, J. Noguera, L. Doyle, and R. Esser, “Generic Software Framework for Adaptive Systems on FPGAs”, in Proceedings of the IEEE Symposium on Field programmable Custom Computing Machines (FCCM), Napa, CA, April 2009, pp. 55–62.

  15. S.A. Fahmy, “Generalised Parallel Bilinear Interpolation Architecture for Vision Systems”, in Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), Cancun, Mexico, December 2008, pp. 331–336.

  16. J. Lotze, S.A. Fahmy, J. Noguera, L. Doyle, and R. Esser, “An FPGA-based Cognitive Radio Framework”, in Proceedings of the IET Irish Signals and Systems Conference (ISSC), Galway, Ireland, June 2008, pp. 138–143.

  17. S.A. Fahmy, C.-S. Bouganis, P.Y.K.Cheung, and W.Luk, “Real-Time Hardware Acceleration of the Trace Transform” in Journal of Real-Time Image Processing, 2(4), pp. 235–248, December 2007, Springer.

  18. S.A. Fahmy, C.-S. Bouganis, P.Y.K. Cheung, and W. Luk, “Efficient Realtime FPGA Implementation of the Trace Transform”, in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 2006, pp. 555–560.

  19. S.A. Fahmy, “Investigating Trace Transform Architectures for Face Authentication”, in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 2006, pp. 929–930.

  20. S.A. Fahmy, P.Y.K. Cheung, and W. Luk, “Novel FPGA-Based Implementation of Median and Weighted Median Filters for Image Processing”, in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 2005, pp. 142–147.

  21. S.A. Fahmy, P.Y.K. Cheung, and W. Luk, “Hardware Acceleration of Hidden Markov Model Decoding for Person Detection”, in Proceedings of the Design, Automation and Test in Europe Conference (DATE), Munich, Germany, March 2005, pp. 8–13.

Posters, Reports, and Demonstrations

  1. K. Vipin and S.A. Fahmy, “Enabling High Level Design of Adaptive Systems with Partial Reconfiguration”, PhD Forum Paper in Proceedings of the International Conference on Field Programmable Technology (FPT), New Delhi, India, December 2011.

  2. K. Vipin and S.A. Fahmy, “A Threat Based Connect6 Implementation on FPGA”, Design Competition Paper in Proceedings of the International Conference on Field Programmable Technology (FPT), New Delhi, India, December 2011.

  3. J. Lotze, S.A. Fahmy, J. Noguera, and L. Doyle, “An FPGA-Based Autonomous Adaptive Radio”, demonstration poster, ACM SIGCOMM, Barcelona, Spain, August 2009.

  4. J. Lotze, B. Ozgül, S.A. Fahmy, J. Noguera, L. Doyle, and R. Esser, “Spectrum Sensing to Achieve Frequency Rendezvous using Xilinx FPGAs”, demonstrated at IEEE Symposia on New Frontiers in Dynamic Spectrum Access Networks (DySPAN), Chicago, Illinois, October 2008.

  5. J. Lotze, S.A. Fahmy, J. Noguera, L. Doyle, and R. Esser, “High-level Cognitive Radio Design Using Xilinx FPGAs”, demonstrated at Collaborative International Software Defined Radio Workshop (CISDR), Maynooth, Ireland, May 2008.

Book Chapter

  • C.-S. Bouganis, S.A. Fahmy, and P.Y.K. Cheung, “From Algorithms to Hardware Implementation” in Next Generation Artifical Vision Systems: Reverse Engineering the Human Visual System, A. Bharath and M. Petrou Eds., Artech House, 2008, pp. 367–393.

PhD Thesis

  • S.A. Fahmy “Hardware Acceleration of the Trace Transform for Vision Applications” PhD Thesis, Imperial College London, University of London, UK, 2007.