School of Electrical and Electronic Engineering
Nanyang Technological University
This article describes the ideas of a general methodology to use TCAD in aiding new semiconductor technology development and deep-submicron transistor design and optimization. It is proposed as an alternative approach, which may supplement or circumvent a lot of pitfalls in the usual practice of TCAD calibration. General description of the Virtual Wafer Fab technology and detailed implementation of the proposal have been discussed in another article, “The Virtual Wafer Fab Technology for the Deep-Submicron ULSI Era,” and carried out as a joint research project (Project DOUST) with Chartered Semiconductor Manufacturing Ltd., Singapore.
© November 1997, X. Zhou. All rights reserved.