Edge-Leakage Current in Shallow Trench Isolation Submicron MOSFETs
Xing Zhou and Khee Yong Lim
Vol. 46, No. 5, pp. 769-772, May 2002.
(Manuscript received 19 December 2000; received in revised form 26
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A simple method is presented to de-embed the edge-leakage current in
shallow trench isolation (STI) submicron MOSFETs from the measured terminal
current. The extremely nonlinear and length-/bias-dependent "subthreshold
hump" has been modeled by a one-piece compact model using a two-step extraction
procedure, which demonstrated excellent prediction to the measurement data.
The result also suggests that the edge leakage exhibits a similar current-voltage
characteristics as the main MOSFET on the same wafer which, if not modeled
as a separate parasitic transistor, would lead to wrong information on
the main transistor's subthreshold slope.
 Akers LA. IEEE Electron Dev Lett 1986;7:419–20.
 Sallagoty P, Ada-Hanifi M, Paoli M, Haond M. IEEE Trans Electron Dev
 Bryant A, Haensch W, Geissler S, Mandelman J, Poindexter D, Steger
M. IEEE Electron Dev Lett 1993;14:412–4.
 Oishi T, Shiozawa K, Furukawa A, Abe Y, Tokuda Y. IEEE Trans Electron
 Niu G, Cressler JD, Mathew SJ, Ahlgren DC. IEEE Electron Dev Lett 1999;20:520–2.
 Agrawal B, De VK, Meindl JD. IEEE Trans Electron Dev 1995;42:2170–80.
 VanDerVoorn PJ, Krusius JP. IEEE Trans Electron Dev 1996;43:1274–80.
 Wang CH, Zhang PF. IEEE Trans Electron Dev 1999;46:139–44.
 Deen MJ, Zuo ZP. IEEE Trans Electron Dev 1991;38:1815–9.
 Zuo ZP, Deen MJ. Solid-St Electron 1991;34:1381–6.
 Deen MJ, Zuo ZP. Solid-St Electron 1993;36:1557–62.
 Cheng Y, Chan M, Hui K, Jeng MC, Liu Z, Huang J, Chen K, Chen J, Tu
R, Ko PK, Hu C. BSIM3v3 manual, UC Berkeley, CA, 1997–1998.
 Zhou X, Lim KY, Lim D. IEEE Trans Electron Dev 1999;46:807–9.
 Zhou X, Lim KY. IEEE Trans Electron Dev 2001;48:887–96.
 Lim KY, Zhou X. to appear in IEEE Trans Electron Dev 2002;49.
 Zhou X, Lim KY, Lim D. IEEE Trans Electron Dev 1999;46:1492–4.
 X. Zhou, S. B. Chiah, K.
Y. Lim, Y. Wang, X. Yu, S. Chwa, A. See, and L. Chan, "Technology-dependent
modeling of deep-submicron MOSFET's and ULSI circuits," (Invited Paper),
Proc. 6th International Conference on Solid-State and Integrated-Circuit
Technology (ICSICT-2001), Shanghai, Oct. 2001, Vol. 2, pp. 855-860.
 V. Re, M. Manghisoni, L. Ratti, V. Speziali, and G. Traversi,
"Impact of lateral isolation oxides on radiation-induced noise degradation
in CMOS technologies in the 100-nm regime," IEEE Trans. Nuclear Sci., Vol.
54, No. 6, pp. 2218-2226, Dec. 2007.