Scalable MOSFET Short-channel Charge Model for All Regions
Guan Huei See*, Siau Ben Chiah*,**, Xing Zhou*, Karthik Chandrasekaran*, Wangzuo Shangguan*, Zhaomin Zhu*, Guan Hui Lim*, Shesh Mani Pandey**, Michael Cheng**, Sanford Chu**, and Liang-Choo Hsia**

* School of Electrical & Electronic Engineering, Nanyang Technological University, Nanyang Avenue, Singapore 639798
Phone: (65) 6790-4532.  Fax: (65) 6793-3318. Email:
** Chartered Semiconductor Manufacturing Ltd, 60 Woodlands Industrial Park D, St. 2, Singapore 738406

Proc. of the NSTI Nanotech 2006 (WCM-MSM2006)

Boston, MA, May 7-11, 2006, vol. 3, pp. 749-752.

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A scalable short-channel MOSFET charge model valid for all bias regions is presented.  As the device length is reduced, long-channel intrinsic charge model cannot predict the short-channel dynamic behavior correctly.  The extrinsic capacitances, such as overlap capacitance and bias-dependent fringing capacitance, must be included in the charge model as they are comparable to the intrinsic capacitance at short-channel dimensions.  In order to ensure model scalability over geometry, short-channel effects must be included in the core charge model.  This paper extends the short-channel models, such as bulk-charge sharing and potential-barrier lowering, for charge modeling that is valid for all regions.  The model is verified by comparison with numerical simulations for three short-channel devices, 0.5, 0.25 and 0.09 um.  It is shown that the model accurately scales with the short-channel capacitances.