Modeling of MOSFETs with Symmetry and Continuity
Siau Ben Chiah*, Xing Zhou*, Karthik Chandrasekaran*, Khee Yong Lim**,
Lap Chan**, and Sanford Chu**
* School of Electrical & Electronic Engineering, Nanyang Technological
University, Nanyang Avenue, Singapore 639798
Phone: (65) 6790-4532. Fax: (65) 6791-2687. Email:
** Chartered Semiconductor Manufacturing Ltd, 60 Woodlands Industrial
Park D, St. 2, Singapore 738406
Proc. of the 7th International Conference on
Modeling and Simulation of Microsystems (WCM-MSM2004)
Boston, MA, March 7-11, 2004, Vol. 2, pp. 175-178.
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This paper presents a unified threshold-voltage-based (Vt-based) MOSFET
model, which maintains source-drain symmetry and allows accurate prediction
of transconductance (gm) and drain conductance (gds) and their derivatives
(gm' and gds') with smooth transitions across regions of operation.
This has been achieved based on our previous unified source-extrapolated
Vt-based model but re-derived with bulk reference for the drain current
(Ids). The unified model combines Vt-based model in strong inversion
with surface-potential-based (ys-based) model
in subthreshold with smooth transitions (in function as well as higher-order
derivatives) across linear/saturation and weak/strong-inversion regions.
It has been verified with the experimental data from a 0.18-µm CMOS
shallow trench isolation (STI) technology wafer.
 J. E. Meyer, “MOS models and circuit simulation,” RCA Rev., vol. 32,
pp. 42–63, 1971.
 Y. Cheng, et al., “BSIM3v3 Manual,” Univ. of California, Berkeley,
 Y. Tsividis, “Operation and Modeling of the MOS Transistor,” McGraw-Hill,
2nd ed., 1999.
 X. Zhou, S. B. Chiah, and K. Y. Lim, “A technology-based compact model
for predictive deep-submicron MOSFET modeling and characterization,” Proc.
Nanotech 2003, Feb. 2003, vol. 2, pp. 266–269.
 X. Zhou and K. Y. Lim, “Unified MOSFET compact I-V model formulation
through physics-based effective transformation,” IEEE Trans. Electron Devices,
vol. 48, no. 5, pp. 887–896, 2001.
 K. Y. Lim and X. Zhou, “MOSFET subthreshold compact modeling with effective
gate overdrive,” IEEE Trans. Electron Devices, vol. 49, no. 1, pp. 196–199,
 K. Y. Lim and X. Zhou, “A physically-based semi-empirical effective
mobility model for MOSFET compact I-V modeling,” Solid-State Electron.,
vol. 45, no. 1, pp. 193–197,2001.
 K. Joardar, K. K. Gullapalli, C. C. McAndrew, M. E. Burnham, and A.
Wild, “An improved MOSFET model for circuit simulation,” IEEE Trans. Electron
Devices, vol. 45, no. 1, pp. 134–148, 1998.
 “Benchmarks for compact MOSFET models,” Electronic Industries Alliance,
 X. Zhou, S. B. Chiah, K. Chandrasekaran, K. Y. Lim, L. Chan, and S.
Chu, “Unified regional approach to consistent and symmetric DC/AC modeling
of deep-submicron MOSFETs,” Proc. Nanotech 2004, Mar. 2004.
 X. Zhou, S. B.
Chiah, K. Chandrasekaran, K. Y. Lim, L. Chan, and S. Chu, "Unified Regional
Approach to Consistent and Symmetric DC/AC Modeling of Deep-Submicron MOSFETs,"
(Invited Paper), Proc. of the 7th International Conference on Modeling
and Simulation of Microsystems (WCM-MSM2004), Boston, MA, March 7-11, 2004,
Vol. 2, pp. 74-79.