Drain Current Model for Deep-Submicron MOSFETs
Siau Ben Chiah*, Xing Zhou*, and Khee Yong Lim
* School of Electrical & Electronic Engineering, Nanyang Technological
University, Nanyang Avenue, Singapore 639798
Phone: (65) 6790-4532. Fax: (65) 6791-2687. Email:
Chartered Semiconductor Manufacturing Ltd, 60 Woodlands Industrial
Park D, St. 2, Singapore 738406
Proc. of the 6th International Conference on
Modeling and Simulation of Microsystems (WCM-MSM2003)
San Francisco, CA, February 23-27, 2003, Vol.
2, pp. 342-345.
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This paper demonstrates a unified geometry-dependent drain current model
for the entire range of drawn length and width without binning, considering
all important short- channel/narrow-width effects, including width-dependent
vertical-field mobility, bias-dependent source/drain series resistance,
velocity saturation/overshoot, as well as the effect of dog-bone geometry
for narrow-width MOSFETs with dog-bone layout in all regions of operation.
It has been verified with the experimental data from 0.18-µm CMOS
shallow trench isolation (STI) technology wafer.
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Proc. of the 6th International Conference on Modeling and Simulation of
Microsystems (WCM-MSM2003), San Francisco, CA, Feb. 2003, vol. 2, pp. 266-269.
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