Experimental Determination of Electrical, Metallurgical, and Physical Gate Lengths of Submicron MOSFET's

Xing Zhou* and Khee Yong Lim
*School of Electrical & Electronic Engineering, Nanyang Technological University,
Nanyang Avenue, Singapore 639798.  (Phone: 65-7904532, Fax: 65-7912687, Email: exzhou@ntu.edu.sg)
†Chartered Semiconductor Manufacturing Ltd, 60 Woodlands Industrial Park D, Street 2, Singapore 738406

Proc. of the 4th International Conference on Modeling and Simulation of Microsystems (MSM2001).

Hilton Head Island, SC, March 19-21, 2001, pp. 44-47.

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A simple, empirically-based method is developed for extraction of submicron MOSFET's effective channel length (Leff) with critical-dimension correction to poly-gate length (Lg) and correlation to metallurgical channel length (Lmet).  A self-consistent compact model for the LDD lateral diffusion is proposed, which can be correlated to the extracted Leff for process control.  The combined experimental determination of Leff, Lmet, and Lg further validates the proposed "critical-current at linear-threshold" ("Icrit@Vt0") Leff-extraction method, and provides important applications in statistical process control and monitoring as well as deep-submicron technology characterization and device modeling.



  1. [9] X. Zhou, K. Y. Lim, and W. Qian, "Threshold voltage definition and extraction for deep-submicron MOSFETs," Solid-State Electron., Vol. 45, No. 3, pp. 507-510, Apr. 2001.
  2. [8] X. Zhou, S. B. Chiah, K. Y. Lim, Y. Wang, X. Yu, S. Chwa, A. See, and L. Chan, "Technology-dependent modeling of deep-submicron MOSFET's and ULSI circuits," (Invited Paper), Proc. 6th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT-2001), Shanghai, Oct. 2001, Vol. 2, pp. 855-860.