A Novel Approach to Compact I-V Modeling for Deep-Submicron MOSFET's Technology Development with Process Correlation

Xing Zhou and Khee Yong Lim

School of Electrical & Electronic Engineering, Nanyang Technological University, Nanyang Avenue, Singapore 639798
Phone: (65) 790-4532.  Fax: (65) 791-2687. Email: exzhou@ntu.edu.sg

Proc. of the 3rd International Conference on Modeling and Simulation of Microsystems  (MSM2000)

San Diego, CA, U.S.A., March 27-29, 2000, pp. 333-336.

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This paper presents a novel approach to formulating compact I-V models for deep-submicron MOS technology development.  The developed model is a one-region closed-form equation that resembles the same form as the long-channel one, which covers full range of channel length and bias conditions.  Model parameter extraction follows a one-iteration prioritized sequence with minimum measurement data, and can be correlated to process variables.



  1. [13] K. Y. Lim and X. Zhou, "A physically-based semi-empirical series resistance model for deep-submicron MOSFET I-V modeling," IEEE Trans. Electron Devices, Vol. 47, No. 6, pp. 1300-1302, June 2000.
  2. [24] X. Zhou and K. Y. Lim, "Unified MOSFET compact I-V model formulation through physics-based effective transformation," IEEE Trans. Electron Devices, Vol. 48, No. 5, pp. 887-896, May 2001.
  3. [20] X. Zhou, S. B. Chiah, K. Y. Lim, Y. Wang, X. Yu, S. Chwa, A. See, and L. Chan, "Technology-dependent modeling of deep-submicron MOSFET's and ULSI circuits," (Invited Paper), Proc. 6th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT-2001), Shanghai, Oct. 2001, Vol. 2, pp. 855-860.