A Compact Model for Future
Generation Predictive Technology Modeling and Circuit Simulation
X. ZHOU*, S. B. CHIAH*, K. CHANDRASEKARAN*, G. H. SEE*, W. Z. SHANGGUAN*,
S. M. PANDEY**, M. CHENG**, S. CHU**, L.-C. HSIA**
*NANYANG TECHNOLOGICAL UNIVERSITY, SINGAPORE
**CHARTERED SEMICONDUCTOR MANUFACTURING LTD, SINGAPORE
Proc. of the 12th International Conference
on Mixed Design of Integrated Circuits and Systems (MIXDES2005),
Kraków, Poland, June 22-25, 2005.
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Transistor compact model has been the cornerstone for bridging the design
of a VLSI circuit/system to the given technology. This has been demonstrated
in the past 4 decades and will continue to be the driving force for developing
more accurate, scalable, predictive, and simple compact models that are
also extendable to keep up with future technology generations. In
this paper, after a brief review of various MOSFET modeling approaches
such as threshold-voltage, inversion-charge, and surface-potential based
models, a unified regional charge-based model with non-pinned surface potential
is described, with emphasis on the ideas and sample results, which demonstrates
combined advantages of the three modeling approaches. The key to
the scalable and predictive capability of the model is due to the regional
approach of current and charge formulations with the physical surface-potential
solutions built in while still retaining the concept of threshold voltage
for technology characterization. The model (called Xsim) requires
minimum measured data with one-iteration parameter extraction, and can
be extended to new generation MOS technologies.
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