MULTI-LEVEL MODELING OF DEEP-SUBMICRON MOSFETS AND
Nanyang Technological University
Proc. of the 9th International Conference on
Mixed Design of Integrated Circuits and Systems (MIXDES2002)
Wroclaw, Poland, June 20-22, 2002, pp. 39-44.
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This paper reviews the trends and needs in multi-level modeling in the
context of deep-submicron MOSFETs and ULSI systems. A dual-representation
of transistors/circuit is proposed and demonstrated through physics-based
compact modeling and single-engine circuit simulator based on subcircuit
expansion. Extension to process correlation and block-level representation
is also proposed, which will be the key to studying process effects on
system performance. This consistent dual-representation allows detailed
physics captured at a lower level to be propagated to the higher level
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