A New "Critical-Current at Linear-Threshold" Method for Direct Extraction of Deep-Submicron MOSFET Effective Channel Length

X. Zhou, Member, IEEE, K. Y. Lim, Student Member, IEEE, and D. Lim

IEEE Transactions on Electron Devices, Vol. 46, No. 7, pp. 1492-1494, July 1999.

(Manuscript received January 7, 1999; revised March 24, 1999.)

Copyright | Abstract | References | Citation | Figures | Reprint | Back


A novel method for direct extraction of deep-submicron MOSFET effective channel length is proposed, which requires only a single measurement of the “critical-current at linear-threshold” (“Icrit @ Vt0”) based on the maximum-gm definition. With a simple calibration of the channel sheet resistance from the long-channel Icrit data, the effective channel length of any short-channel device on the same wafer can be determined with one measurement of Icrit @ Vt0 : Meanwhile, an averaged (modeled) effective channel length can be obtained from the same data set with a simple algorithm, which can be used for device/circuit modeling.



  1. [10] X. Zhou, K. Y. Lim, and D. Lim, "A general approach to compact threshold voltage formulation based on 2-D numerical simulation and experimental correlation for deep-submicron ULSI technology development," IEEE Trans. Electron Devices, Vol. 47, No. 1, pp. 214-221, Jan. 2000.
  2. [9] X. Zhou and K. Y. Lim, "Experimental determination of electrical, metallurgical, and physical gate lengths of submicron MOSFET's," Proc. 4th International Conference on Modeling and Simulation of Microsystems (MSM2001), Hilton Head Island, SC, Mar. 2001, pp. 44-47.
  3. [6] X. Zhou, K. Y. Lim, and W. Qian, "Threshold voltage definition and extraction for deep-submicron MOSFETs," Solid-State Electron., Vol. 45, No. 3, pp. 507-510, Apr. 2001.
  4. [18] X. Zhou and K. Y. Lim, "Unified MOSFET compact I-V model formulation through physics-based effective transformation," IEEE Trans. Electron Devices, Vol. 48, No. 5, pp. 887-896, May 2001.
  5. [7] X. Zhou, S. B. Chiah, K. Y. Lim, Y. Wang, X. Yu, S. Chwa, A. See, and L. Chan, "Technology-dependent modeling of deep-submicron MOSFET's and ULSI circuits," (Invited Paper), Proc. 6th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT-2001), Shanghai, Oct. 2001, Vol. 2, pp. 855-860.
  6. [16] X. Zhou and K. Y. Lim, "De-embedding length-dependent edge-leakage current in shallow trench isolation submicron MOSFETs," to appear in Solid-State Electron., 2002.
  7. [14] M. Y. Kwong, C.-H. Choi, R. Kasnavi, P. Griffin, R. D. Dutton, "Series Resistance Calculation for Source/Drain Extension Regions Using 2-D Device Simulation," IEEE Trans. Electron Devices, Vol. 49, No. 7, pp. 1219-1226, July 2002. Download PDF

IEEE Xplore Citation
ISI Citation