Physics-based Single-piece Charge Model for Strained-Si MOSFETs

Karthik Chandrasekaran, Xing Zhou, Senior Member, IEEE, Siau Ben Chiah, Wangzuo Shangguan, and Guan Huei See

IEEE Transactions on Electron Devices, Vol. 52, No. 7, pp. 1555-1562, July 2005
(Manuscript received December 20, 2004; revised  April 6, 2005.)

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A physics-based single-piece charge model for strained-silicon (s-Si) MOSFETs from accumulation to strong-inversion regions is presented.  The model is formulated from regional solutions of the well-known Pao–Sah equation and unified with interpolation functions while keeping the physics in the derived flat-band voltages that depend on the device material and structural parameters, such as band gaps, conduction and valence band offsets, Ge mole fraction, layer thickness, and doping.  The model is validated by comparison with numerical devices for a wide range of Ge mole fractions and s Si layer thicknesses.  It is shown that the model accurately describes the physical behavior of the surface potentials, terminal charges and capacitances, especially charge accumulation/depletion at the s Si/SiGe interface that gives rise to the observed "plateau" in the capacitance-voltage characteristics.



  1. [11] K. Chandrasekaran, X. Zhou, S. B. Chiah, W. Z. Shangguan, and G. H. See, L. K. Bera, N. Balasubramanian, and S. C. Rustagi, "Effect of Substrate Doping on the Capacitance–Voltage Characteristics of Strained-silicon pMOSFETs," IEEE Electron Device Lett., Vol. 27, No. 1, pp. 62-64, January 2006.
  2. [51] M. J. Kumar, V. Venkataraman, and S. Nawal, "A simple analytical threshold voltage model of nanoscale single-layer fully depleted strained-silicon-on-insulator MOSFETs," IEEE Trans. Electron Devices, vol. 53, no. 10, pp. 2500-2506, Oct, 2006. 
  3. [12] K. Chandrasekaran, X. Zhou, S. B. Chiah, G. H. See, and S. C. Rustagi, "Implicit Analytical Surface/Interface Potential Solutions for Modeling Strained-Si MOSFETs," IEEE Trans. Electron Devices, Vol. 53, No. 12, pp. 3110-3117, Dec. 2006.
  4. [30] V. Venkataraman, S. Nawal, and M. J. Kumar, "Compact analytical threshold-voltage model of nanoscale fully depleted strained-Si on silicon-germanium-on-insulator (SGOI) MOSFETs," IEEE Trans. Electron Devices, vol. 54, no. 3, pp. 554-562, Mar, 2007.
  5. [] M. K. Bera and C. K. Maiti, "Reliability of ultra thin ZrO2 films on strained-Si," Microelectron. Reliab., vol. 48, no. 5, pp. 682-692, May 2008.
  6. [] L. Zhang, J. He, J. Zhang, F. Liu, Y. Fu, Y. Song, and X. Zhang, "An Analytic Model for Nanowire MOSFETs With Ge/Si Core/Shell Structure," IEEE Trans. Electron Devices, vol. 55, no. 11, pp. 2907-2917, Nov. 2008.