June 2008
– now
Assistant Chair, Alumni, School
of Electrical and Electronic Engineering, Nanyang Technological University,
Singapore.
June 2008 – now
Advisor
and School Liaison of EEE Alumni Association.
February 2000 - December 2011
Deputy Director, Centre of High Performance Embedded Systems,
the university level research centre hosted by the School of Computer
Engineering and School of Electrical and Electronic Engineering, Nanyang
Technological University, Singapore.
April 2003 – December 2010
Program Director, VLSI Circuits and Embedded Systems Research
Group, Centre of Integrated Circuits and Systems, School of Electrical and
Electronic Engineering, Nanyang Technological University, Singapore.
February 2009
– January 2010
Chairman, School Search
Committee for Three Assistant Professors in VLSI and IC Design
1. Singapore Principal Investigator of ‘Electronic
Circuit Design – Systems’ team of Singapore-MIT Alliance for Research &
Technology (SMART) 5-year Interdisciplinary Research Group (IRG5) research
program on Low Energy Electronic Systems (LEES), Approved total program funding
S$25M, target start date: January 2012. Target Date of Completion: December
2016. (The objective of LEES is
to create an interdisciplinary research environment in which materials,
device, and integrated researchers work together to shape innovation in seminconductor
and integrated technology, leading to new low-energy systems. The goal of the
‘Electronic Circuit Design’ subprogram of LEES is to design the world’s first
monolithic III-V/Si CMOS electronic and optoelectronic circuits and explore
unique circuit designs that could not have been done with a silicon CMOS
platform alone)
2. Principal co-investigator
of “A 3D Design Platform of
Multi-Processor System-on-Chip for New Media Application”, Ministry of Education
Academic Research Grant Tier II August 2010, Project No. MOE2010-T2-2-037, Approved amount S$726,100.00, Target Date of
Commencement: 1 June 2011. Target Date of Completion: 31 May 2014.
3. Collaborator of “Application of
watermarking techniques in VLSI IP protection", Project No.
JC200903180629A, Shenzhen Bureau of Science, Technology and Information,
Approved funding RMB100,000.00, Date of Acceptance: 1 March 2009. Target Date
of Completion: 31 March 2010
4. Principal co-investigator of “Low
Complexity Dynamically Reconfigurable Signal Processing for Cognitive Radio”,
Project No. T208B1216 (ARC 10/08), Approved funding S$687,520.00, Date of
Acceptance: 1 November 2008. Target Date of Completion: 31 October 2011.
5.
Principal investigator of “Logical Reversibility and Redundancy for
Dependable Nanoelectronic Computations”, F&E Phase II Funding,
M8008.U.EEE.01, Approved amount S$43,715, Date of Acceptance: 1 November
2006. Date of Completion: 31 October 2007.
6. Collaborator
of “A powerful datapath with less power?”, NTU College of Engineering Startup
grant, M58020001.706022. Amount: S$98,000.
7. Principal
co-investigator of “Low power reconfigurable receiver architectures for
migrating software defined radio technology from base stations to handsets”,
URC/AcRF (RG 8/05), Approved amount S$64,514, Date of Acceptance: 11 October
2005. Date of Completion: 31 December 2008
8. Principal
co-investigator of “Power Sensitive Techniques for High Productivity Embedded
Systems”, funded by A*STAR, Project No. 022 160 0046, Approved amount
S$561,090. Date of Acceptance: April 2003. Date of Completion: 30 June 2006.
9. Principal
investigator of “Algorithms and architectures for high rate WPAN”, Joint
R&D between Panasonic Singapore Laboratory and NTU, MOU approved on 3
April 2001, total external funding of S$100,000 under research account number
M48900001, Date of completion: 2 April 2004
10. Principal
co-investigator of “Intelligent Embedded Systems”, ACRF (RG41/97), Approved
amount S$99, 190, Date of Acceptance: 1 April 1998, Date of Completion:
November 2001.
